Design and Simulation of a Digital Filter in Hardware for EEG Signals Based on FPGA

Yarahuaman J.C.R.; Huamani-Navarrete P.F. · 2020 IEEE ANDESCON, ANDESCON 2020 (2020) · DOI: 10.1109/andescon50619.2020.9272150

Resumen

This paper presents a Design and Simulation of a Digital Filter with Finite Impulse Response in Hardware, for electroencephalographic (EEG) signals based on Field Programmable Gate Array (FPGA). The signals EEG were obtained from database of Graz University of Technology which is a database of EEG signals based on multi-class motor imaginations paradigms. The purpose of this research was to filter the noise of the EEG signals due to different factors and electronic components that contaminate then during the digitization stage. The Modelsim and Matlab software were used for the design and simulation stage of digital filter and the Hamming and Blackman windows for the design of the filter with an order of 81 and the development board DE0-Nano-SoC for the hardware description of the digital filter. Finally, it was obtained a high performance of combinational logic resources occupying 98% and low latency in processing time.

Instituciones: Universidad Ricardo Palma; Universidad Tecnológica del Perú